³ÉÈËVRÊÓƵ

ECSE 530 Logic Synthesis (3 unités)

important

Nota : Ceci est la version 2018–2019 de l'annuaire électronique. Veuillez mettre à jour l'année dans la barre d'adresse de votre navigateur pour une version plus récente de cette page, ou .

Offered by: Génie électr. et informatique (Génie et l'architecture)

Vue d'ensemble

Génie électrique : The place of logic synthesis in microelectronics. Representations of Boolean functions: logic covers, binary decision diagrams. Two-level synthesis algorithms, Espresso. Multi-level synthesis to Boolean networks: don't care methods, algebraic optimizations, delay modelling. Sequential synthesis: state-based optimizations, state assignment, network optimizations. Technology mapping: library cell and FPGA mapping.

Terms: This course is not scheduled for the 2018-2019 academic year.

Instructors: There are no professors associated with this course for the 2018-2019 academic year.

Back to top